395 search results - page 36 / 79 » Encoding Algorithms for Logic Synthesis |
DAC
2005
ACM
16 years 3 months ago
2005
ACM
Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process technologies. This trend will only strengthen with futu...
121
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RTSS
2008
IEEE
15 years 8 months ago
2008
IEEE
This paper presents algorithms that (1) facilitate systemindependent synthesis of timing-interfaces for subsystems and (2) system-level selection of interfaces to minimize CPU loa...
132
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FPGA
2007
ACM
15 years 8 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
100
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VTS
2005
IEEE
15 years 8 months ago
2005
IEEE
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
123
Voted
DAC
2008
ACM
16 years 3 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...