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ICCAD
2008
IEEE
105views Hardware» more  ICCAD 2008»
14 years 3 months ago
Parameterized transient thermal behavioral modeling for chip multiprocessors
In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for ...
Duo Li, Sheldon X.-D. Tan, Eduardo H. Pacheco, Mur...
DAC
2008
ACM
14 years 7 months ago
Daedalus: toward composable multimedia MP-SoC design
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
Hristo Nikolov, Mark Thompson, Todor Stefanov, And...
ASPLOS
2009
ACM
14 years 1 months ago
Architectural implications of nanoscale integrated sensing and computing
This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new compu...
Constantin Pistol, Christopher Dwyer, Alvin R. Leb...
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
14 years 3 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
ASPDAC
2006
ACM
143views Hardware» more  ASPDAC 2006»
14 years 17 days ago
Constraint-driven bus matrix synthesis for MPSoC
– Modern multi-processor system-on-chip (MPSoC) designs have high bandwidth constraints which must be satisfied by the underlying communication architecture. Bus matrix based com...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...