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FPL
2006
Springer
127views Hardware» more  FPL 2006»
13 years 11 months ago
On-FPGA Communication Architectures and Design Factors
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
13 years 11 months ago
Tempest and Typhoon: User-Level Shared Memory
Future parallel computers must efficiently execute not only hand-coded applications but also programs written in high-level, parallel programming languages. Today's machines ...
Steven K. Reinhardt, James R. Larus, David A. Wood
ARCS
2008
Springer
13 years 9 months ago
An Optimized ZGEMM Implementation for the Cell BE
: The architecture of the IBM Cell BE processor represents a new approach for designing CPUs. The fast execution of legacy software has to stand back in order to achieve very high ...
Timo Schneider, Torsten Hoefler, Simon Wunderlich,...
JCP
2008
126views more  JCP 2008»
13 years 7 months ago
Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...
Shouling He, Xuping Xu
DAC
2004
ACM
14 years 8 months ago
Automated energy/performance macromodeling of embedded software
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estim...
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, ...