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» Energy minimization using multiple supply voltages
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DAC
1999
ACM
13 years 12 months ago
Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
Vijay Sundararajan, Keshab K. Parhi
ISLPED
2004
ACM
159views Hardware» more  ISLPED 2004»
14 years 1 months ago
Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems
Traditionally, dynamic voltage scaling (DVS) techniques have focused on minimizing the processorenergy consumption as opposed to the entire system energy consumption. The slowdown...
Ravindra Jejurikar, Rajesh K. Gupta
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
14 years 27 days ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
ISCA
2012
IEEE
191views Hardware» more  ISCA 2012»
11 years 10 months ago
VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors
Power consumption is a primary concern for microprocessor designers. Lowering the supply voltage of processors is one of the most effective techniques for improving their energy e...
Timothy N. Miller, Renji Thomas, Xiang Pan, Radu T...
ISVLSI
2002
IEEE
174views VLSI» more  ISVLSI 2002»
14 years 16 days ago
Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
Alice Wang, Anantha Chandrakasan, Stephen V. Koson...