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ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 29 days ago
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
Nathan Clark, Jason A. Blome, Michael L. Chu, Scot...
ECRTS
2000
IEEE
13 years 11 months ago
Towards validated real-time software
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Valérie Bertin, Michel Poize, Jacques Pulou...
CASES
2008
ACM
13 years 9 months ago
Optimus: efficient realization of streaming applications on FPGAs
In this paper, we introduce Optimus: an optimizing synthesis compiler for streaming applications. Optimus compiles programs written in a high level streaming language to either so...
Amir Hormati, Manjunath Kudlur, Scott A. Mahlke, D...
CASES
2009
ACM
13 years 11 months ago
Exploiting residue number system for power-efficient digital signal processing in embedded processors
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shr...
DATE
2005
IEEE
121views Hardware» more  DATE 2005»
14 years 1 months ago
C Compiler Retargeting Based on Instruction Semantics Models
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compil...
Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, ...