Sciweavers

    29 search results - page 1 / 6
    » Energy-recovery CMOS for highly pipelined DSP designs
    Sort
    View
    ISLPED
    1996
    ACM
    68views Hardware» more  ISLPED 1996»
    Energy-recovery CMOS for highly pipelined DSP designs
    13 years 11 months ago
    Energy-recovery CMOS for highly pipelined DSP designs
    Download  www.cecs.uci.edu
    We compare the frequency-versus-power dissipation performance of two energy-recovery CMOS implementations to that of a conventional, supply-voltage-scaled design. The application ...
    William C. Athas, W.-C. Liu, Lars J. Svensson
    claim paper
    Read More »
    ISLPED
    1995
    ACM
    134views Hardware» more  ISLPED 1995»
    High-throughput and low-power DSP using clocked-CMOS circuitry
    13 years 11 months ago
    High-throughput and low-power DSP using clocked-CMOS circuitry
    Download  www.cecs.uci.edu
    We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...
    Manjit Borah, Robert Michael Owens, Mary Jane Irwi...
    claim paper
    Read More »
    ISLPED
    2003
    ACM
    85views Hardware» more  ISLPED 2003»
    Energy recovery clocking scheme and flip-flops for ultra low-energy applications
    14 years 26 days ago
    Energy recovery clocking scheme and flip-flops for ultra low-energy applications
    Download  userwww.sfsu.edu
    A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
    Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy
    claim paper
    Read More »
    CDES
    2006
    240views Hardware» more  CDES 2006»
    Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
    13 years 9 months ago
    Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
    Download  ww1.ucmss.com
    Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
    Arun N. Chandorkar, Gurvinder Singh
    claim paper
    Read More »
    ICIP
    2007
    IEEE
    155views Image Processing» more  ICIP 2007»
    Software Pipelines Design for Variable Block-Size Motion Estimation with Large Search Range
    14 years 1 months ago
    Software Pipelines Design for Variable Block-Size Motion Estimation with Large Search Range
    Download  www.jdl.ac.cn
    This paper presents some techniques for efficient motion estimation (ME) implementation on fixed-point digital signal processor (DSP) for high resolution video coding. First, chal...
    Zhigang Yang, Wen Gao, Yan Liu, Debin Zhao
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.