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» Enhanced Code Compression for Embedded RISC Processors
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ICIP
2004
IEEE
14 years 9 months ago
Scalable predictive coding by nested quantization with layered side information
An efficient scalable predictive coding method is proposed for the Wyner-Ziv problem, using nested lattice quantization followed by multi-layer Slepian-Wolf coders (SWC) with laye...
Huisheng Wang, Antonio Ortega
ISCAS
1999
IEEE
124views Hardware» more  ISCAS 1999»
13 years 11 months ago
On the robustness of vector set partitioning image coders to bit errors
A vector enhancement of Said and Pearlman's Set Partitioning in Hierarchical Trees (SPIHT) methodology, named VSPIHT, has recently been proposed for embedded wavelet image co...
D. Mukherjee, S. K. Mitra
CASES
2006
ACM
14 years 1 months ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
DAC
1997
ACM
13 years 11 months ago
Static Timing Analysis of Embedded Software
This paper examines the problem of statically analyzing the performance of embedded software. This problem is motivated by the increasing growth of embedded systems and a lack of ...
Sharad Malik, Margaret Martonosi, Yau-Tsun Steven ...
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 1 months ago
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
— Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in “trusted” software t...
Divya Arora, Srivaths Ravi, Anand Raghunathan, Nir...