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» Enhanced clustered voltage scaling for low power
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ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
14 years 21 days ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
TDSC
2010
111views more  TDSC 2010»
13 years 5 months ago
Using Underutilized CPU Resources to Enhance Its Reliability
—Soft errors (or Transient faults) are temporary faults that arise in a circuit due to a variety of internal noise and external sources such as cosmic particle hits. Though soft ...
Avi Timor, Avi Mendelson, Yitzhak Birk, Neeraj Sur...
ISCAS
2005
IEEE
159views Hardware» more  ISCAS 2005»
14 years 1 months ago
A low power FPGA routing architecture
— Significant headway has been made in logic density and performance of FPGAs in the past decade. Power efficiency of FPGA architectures is arguably the next most important crite...
Somsubhra Mondal, Seda Ogrenci Memik
ISLPED
1999
ACM
160views Hardware» more  ISLPED 1999»
13 years 11 months ago
Mixed-swing quadrail for low power dual-rail domino logic
This paper describes a new mixed-swing topology for dual-rail domino logic that results in a simultaneous energy and delay reduction. HSPICE simulation results for a 1-bit full ad...
Bharath Ramasubramanian, Herman Schmit, L. Richard...
ICPPW
2007
IEEE
14 years 1 months ago
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
Gang Qu