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FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
14 years 20 days ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
GLVLSI
2006
IEEE
120views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Sensitivity evaluation of global resonant H-tree clock distribution networks
A sensitivity analysis of resonant H-tree clock distribution networks is presented in this paper for a TSMC 0.18 μm CMOS technology. The analysis focuses on the effect of the dri...
Jonathan Rosenfeld, Eby G. Friedman
DATE
2004
IEEE
132views Hardware» more  DATE 2004»
13 years 11 months ago
Hybrid Architectural Dynamic Thermal Management
When an application or external environmental conditions cause a chip's cooling capacity to be exceeded, dynamic thermal management (DTM) dynamically reduces the power densit...
Kevin Skadron
ICCD
2006
IEEE
140views Hardware» more  ICCD 2006»
14 years 4 months ago
Clustering-Based Microcode Compression
Abstract— Microcode enables programmability of (micro) architectural structures to enhance functionality and to apply patches to an existing design. As more features get added to...
Edson Borin, Mauricio Breternitz Jr., Youfeng Wu, ...
IPPS
2006
IEEE
14 years 1 months ago
Conjugate gradient sparse solvers: performance-power characteristics
We characterize the performance and power attributes of the conjugate gradient (CG) sparse solver which is widely used in scientific applications. We use cycle-accurate simulatio...
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary ...