43 search results - page 5 / 9 » Equivalence Checking of Reversible Circuits |
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Modern combinational equivalence checking (CEC) engines are complicated programs which are difficult to verify. In this paper we show how a modern CEC engine can be modified to pr...
CDES
2006
13 years 8 months ago
2006
Multi-valued Fredkin gates (MVFG) are reversible gates and they can be considered as modified version of the better known reversible gate the Fredkin gate. Reversible logic gates ...