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» Equivalent Waveform Propagation for Static Timing Analysis
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DATE
2003
IEEE
76views Hardware» more  DATE 2003»
13 years 12 months ago
Modeling Noise Transfer Characteristic of Dynamic Logic Gates
Dynamic noise analysis is recently gaining more attention as a definitive method to overcome glaring deficiencies of static noise analysis. Exact dynamic noise analysis requires...
Li Ding 0002, Pinaki Mazumder
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
13 years 11 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
ICCD
2000
IEEE
123views Hardware» more  ICCD 2000»
14 years 3 months ago
Analysis and Optimization of Ground Bounce in Digital CMOS Circuits
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
Payam Heydari, Massoud Pedram
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
14 years 3 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...
DAC
2008
ACM
14 years 7 months ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada