79 search results - page 9 / 16 » Erlang B as a Performance Model for IP Flows |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bris...
SAFECOMP
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. Simulation-based Fault Injection in VHDL descriptions is increasingly common due to the popularity of top-down design flows exploiting this language. This paper presents ...
ICCCN
2007
IEEE
14 years 1 months ago
2007
IEEE
— Low rate DoS attacks are emerging threats to the TCP traffic, and the VoIP traffic in the Internet. They are hard to detect as they intelligently send attack traffic inside the...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Processing and storage of confidential or critical information is an every day occurrence in computing systems. The trustworthiness of computing devices has become an important co...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...