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» Error Control Codes for Parallel Asymmetric Channels
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ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
11 years 9 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
13 years 11 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
ICC
2008
IEEE
116views Communications» more  ICC 2008»
14 years 1 months ago
Intelligent Weather Aware Scheme for Satellite Systems
— Rain, snow, gaseous, cloud, fog, scintillation and other atmospheric properties can have a distorting effect on signal fidelity of Ku and Ka bands, thus resulting in excessive ...
Kamal Harb, Changcheng Huang, Anand Srinivasan, Br...
ICC
2007
IEEE
155views Communications» more  ICC 2007»
14 years 1 months ago
On Supporting Robust Voice Multicasting Over Ad Hoc Wireless Networks
Abstract— In this paper, we address the problem of voice multicasting in ad hoc wireless networks. The unique characteristics of voice traffic (viz. small packet size, high pack...
G. Venkat Raju, Tamma Bheemarjuna Reddy, C. Siva R...