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» Estimating the Computational Cost of Logic Programs
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MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
13 years 11 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
FPGA
2004
ACM
140views FPGA» more  FPGA 2004»
13 years 11 months ago
Using reconfigurability to achieve real-time profiling for hardware/software codesign
Embedded systems combine a processor with dedicated logic to meet design specifications at a reasonable cost. The attempt to amalgamate two distinct design environments introduces...
Lesley Shannon, Paul Chow
ICS
2005
Tsinghua U.
14 years 1 months ago
Low-power, low-complexity instruction issue using compiler assistance
In an out-of-order issue processor, instructions are dynamically reordered and issued to function units in their dataready order rather than their original program order to achiev...
Madhavi Gopal Valluri, Lizy Kurian John, Kathryn S...
ISQED
2005
IEEE
125views Hardware» more  ISQED 2005»
14 years 1 months ago
A New Method for Design of Robust Digital Circuits
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...
ATAL
2010
Springer
13 years 8 months ago
Optimal social laws
Social laws have proved to be a powerful and theoretically elegant framework for coordination in multi-agent systems. Most existing models of social laws assume that a designer is...
Thomas Ågotnes, Michael Wooldridge