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CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
CODES
2010
IEEE
13 years 5 months ago
Accurate online power estimation and automatic battery behavior based power model generation for smartphones
This paper describes PowerBooter, an automated power model construction technique that uses built-in battery voltage sensors and knowledge of battery discharge behavior to monitor...
Lide Zhang, Birjodh Tiwana, Zhiyun Qian, Zhaoguang...
CASES
2006
ACM
14 years 1 months ago
Mitigating soft error failures for multimedia applications by selective data protection
With advances in process technology, soft errors (SE) are becoming an increasingly critical design concern. Due to their large area and high density, caches are worst hit by soft ...
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, N...
FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
14 years 1 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
EMSOFT
2004
Springer
14 years 1 months ago
Practical PACE for embedded systems
In current embedded systems, one of the major concerns is energy conservation. The dynamic voltage-scheduling (DVS) framework, which involves dynamically adjusting the voltage and...
Ruibin Xu, Chenhai Xi, Rami G. Melhem, Daniel Moss...