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» Evaluating Hardware Compilation Techniques
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CJ
1999
126views more  CJ 1999»
15 years 4 months ago
Source Level Static Branch Prediction
The ability to predict the directions of branches, especially conditional branches, is an important problem in modern computer architecture and advanced compilers. Many static and...
W. F. Wong
CODES
2004
IEEE
15 years 8 months ago
Operation tables for scheduling in the presence of incomplete bypassing
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
DATE
2009
IEEE
98views Hardware» more  DATE 2009»
15 years 11 months ago
Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC
—In this paper we present an adaptive technique to locally adjust the frequency of processing elements on MP-SoC. The proposed method, based on Game Theory, optimizes the system ...
Diego Puschini, Fabien Clermidy, Pascal Benoit, Gi...
129
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DDECS
2008
IEEE
104views Hardware» more  DDECS 2008»
15 years 11 months ago
Temperature-Aware Task Mapping for Energy Optimization with Dynamic Voltage Scaling
—Temperature has become an important issue in nowadays MPSoCs design due to the ever increasing power densities and huge energy consumption. This paper proposes a temperature-awa...
Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
ICCAD
1997
IEEE
133views Hardware» more  ICCAD 1997»
15 years 8 months ago
Functional simulation using binary decision diagrams
In many veri cation techniques fast functional evaluation of a Boolean network is needed. We investigate the idea of using Binary Decision Diagrams BDDs for functional simulatio...
Christoph Scholl, Rolf Drechsler, Bernd Becker