1304 search results - page 129 / 261 » Evaluating Hardware Compilation Techniques |
136
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ISCAS
2007
IEEE
15 years 11 months ago
2007
IEEE
— In this paper, we use the CoDeL platform to develop test circuits and analyze the potential and performance impact of power gating individual registers. For each register, we e...
111
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FMCAD
2007
Springer
15 years 11 months ago
2007
Springer
—Embedded systems typically consist of a composition of a set of hardware and software IP modules. Each module is heavily optimized by itself. However, when these modules are com...
137
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CODES
2004
IEEE
15 years 8 months ago
2004
IEEE
The memory bandwidth largely determines the performance and energy cost of embedded systems. At the compiler level, several techniques improve the memory bandwidth at the scope of...
118
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DSN
2006
IEEE
15 years 10 months ago
2006
IEEE
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Computer architects have typically ad...
142
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ISLPED
2004
ACM
15 years 10 months ago
2004
ACM
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...