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» Evaluating Hardware Compilation Techniques
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DATE
2009
IEEE
126views Hardware» more  DATE 2009»
14 years 2 months ago
Separate compilation and execution of imperative synchronous modules
—The compilation of imperative synchronous languages like Esterel has been widely studied, the separate compilation of synchronous modules has not, and remains a challenge. We pr...
Eric Vecchié, Jean-Pierre Talpin, Klaus Sch...
DEBS
2010
ACM
13 years 11 months ago
Evaluation of streaming aggregation on parallel hardware architectures
We present a case study parallelizing streaming aggregation on three different parallel hardware architectures. Aggregation is a performance-critical operation for data summarizat...
Scott Schneider, Henrique Andrade, Bugra Gedik, Ku...
ASPDAC
1998
ACM
86views Hardware» more  ASPDAC 1998»
13 years 12 months ago
Parallelization in Co-Compilation for Configurable Accelerators
— The paper introduces a novel co-compiler and its “vertical” parallelization method, including a general model for co-operating host/accelerator platforms and a new parallel...
Jürgen Becker, Reiner W. Hartenstein, Michael...
IEEEPACT
2003
IEEE
14 years 29 days ago
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjee...
CC
2005
Springer
106views System Software» more  CC 2005»
14 years 1 months ago
Source-Level Debugging for Multiple Languages with Modest Programming Effort
Abstract. We present techniques that enable source-level debugging for multiple languages at the cost of only modest programming effort. The key idea is to avoid letting debugging ...
Sukyoung Ryu, Norman Ramsey