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» Evaluating Hardware Compilation Techniques
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FPL
2006
Springer
95views Hardware» more  FPL 2006»
14 years 1 months ago
Automation of IP Core Interface Generation for Reconfigurable Computing
Pre-designed IP cores for FPGAs represent a huge intellectual and financial wealth that must be leveraged by any high-level tool targeting reconfigurable platforms. In this paper ...
Zhi Guo, Abhishek Mitra, Walid A. Najjar
MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
14 years 3 months ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
ICS
2000
Tsinghua U.
14 years 1 months ago
Compiling object-oriented data intensive applications
Processing and analyzing large volumes of data plays an increasingly important role in many domains of scienti c research. High-level language and compiler support for developing ...
Renato Ferreira, Gagan Agrawal, Joel H. Saltz
IEEEPACT
1998
IEEE
14 years 2 months ago
Parallelization of Benchmarks for Scalable Shared-Memory Multiprocessors
This work identifies practical compiling techniques for scalable shared memory machines. For this, we have focused on experimental studies using a real machine and representative ...
Yunheung Paek, Angeles G. Navarro, Emilio L. Zapat...
ICCAD
2006
IEEE
180views Hardware» more  ICCAD 2006»
14 years 7 months ago
A bitmask-based code compression technique for embedded systems
Embedded systems are constrained by the available memory. Code compression techniques address this issue by reducing the code size of application programs. Dictionary-based code c...
Seok-Won Seong, Prabhat Mishra