1304 search results - page 64 / 261 » Evaluating Hardware Compilation Techniques |
128
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EDBT
2010
ACM
15 years 7 months ago
2010
ACM
Suffix trees are indexing structures that enhance the performance of numerous string processing algorithms. In this paper, we propose cache-conscious suffix tree construction algo...
139
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JSA
2006
15 years 4 months ago
2006
It is often possible to greatly improve the performance of a hardware system via the use of predictive (speculative) techniques. For example, the performance of out-of-order micro...
147
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JCP
2008
15 years 4 months ago
2008
With the wireless communications coming to homes and offices, the need to have secure data transmission is of utmost importance. Today, it is important that information is sent con...
128
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FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...
122
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DATE
2002
IEEE
15 years 9 months ago
2002
IEEE
Phased logic has been proposed as a technique for realizing self-timed circuitry that is delay-insensitive and requires no global clock signals. Early evaluation techniques have b...