1304 search results - page 66 / 261 » Evaluating Hardware Compilation Techniques |
151
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ICCAD
2004
IEEE
16 years 1 months ago
2004
IEEE
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
122
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ISCA
1998
IEEE
15 years 8 months ago
1998
IEEE
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
134
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IFL
2007
Springer
15 years 10 months ago
2007
Springer
Haskell is a functional language, with features such as higher order functions and lazy evaluation, which allow succinct programs. These high-level features present many challenges...
111
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CC
2007
Springer
15 years 10 months ago
2007
Springer
To achieve high resource utilization for multi-issue Digital Signal Processors (DSPs), production compilers commonly include variants of the iterative modulo scheduling algorithm. ...
125
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SC
1995
ACM
15 years 8 months ago
1995
ACM
This paper presents techniques for compiling loops with complex, indirect array accesses into loops whose array references have at most one level of indirection. The transformatio...