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» Evaluating Hardware Compilation Techniques
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DAC
2003
ACM
16 years 5 months ago
Compiler-generated communication for pipelined FPGA applications
In this paper, we describe a set of compiler analyses and an implementation that automatically map a sequential and un-annotated C program into a pipelined implementation, targete...
Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
ISSTA
1993
ACM
15 years 8 months ago
Mutation Analysis Using Mutant Schemata
Mutation analysis is a powerful technique for assessing and improving the quality of test data used to unit test software. Unfortunately, current automated mutation analysis syste...
Roland H. Untch, A. Jefferson Offutt, Mary Jean Ha...
CC
2007
Springer
143views System Software» more  CC 2007»
15 years 10 months ago
Accurate Garbage Collection in Uncooperative Environments with Lazy Pointer Stacks
Implementing a new programming language by the means of a translator to an existing language is attractive as it provides portability over all platforms supported by the host langu...
Jason Baker, Antonio Cunei, Filip Pizlo, Jan Vitek
PLDI
1999
ACM
15 years 8 months ago
Enhanced Code Compression for Embedded RISC Processors
This paper explores compiler techniques for reducing the memory needed to load and run program executables. In embedded systems, where economic incentives to reduce both ram and r...
Keith D. Cooper, Nathaniel McIntosh
CODES
2007
IEEE
15 years 10 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...