1304 search results - page 90 / 261 » Evaluating Hardware Compilation Techniques |
147
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ISSS
1996
IEEE
15 years 8 months ago
1996
IEEE
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
108
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ICCD
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper describes a core-customization process of a CISC processor core for a given application program. It aims at the power reduction in the CISC processor core by fully util...
136
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ISCA
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
126
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DATE
2010
IEEE
15 years 9 months ago
2010
IEEE
Abstract—To respond to variations in solar energy, harvestedenergy prediction is essential to harvested-energy management approaches. The effectiveness of such approaches is depe...
144
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CAV
2005
Springer
15 years 10 months ago
2005
Springer
In this work we study hybrid approaches to LTL symbolic model checking; that is, approaches that use explicit representations of the property automaton, whose state space is often ...