1304 search results - page 94 / 261 » Evaluating Hardware Compilation Techniques |
150
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ICCD
1999
IEEE
15 years 8 months ago
1999
IEEE
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
149
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ICCAD
2009
IEEE
15 years 2 months ago
2009
IEEE
While Dynamic Voltage Scaling (DVS) remains as a popular energy management technique for real-time embedded applications, recent research has identified significant and negative i...
144
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MICRO
2009
IEEE
15 years 11 months ago
2009
IEEE
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
131
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ITC
1997
IEEE
15 years 8 months ago
1997
IEEE
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
132
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FPL
2005
Springer
15 years 10 months ago
2005
Springer
This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit...