127 search results - page 19 / 26 » Evaluating Hardware Support for Reference Counting Using Sof... |
IPPS
2003
IEEE
14 years 22 days ago
2003
IEEE
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
CORR
2010
Springer
13 years 2 months ago
2010
Springer
We introduce a new simulation platform called Insight, created to design and simulate cyber-attacks against large arbitrary target scenarios. Insight has surprisingly low hardware...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
PC
2007
13 years 7 months ago
2007
We explore runtime mechanisms and policies for scheduling dynamic multi-grain parallelism on heterogeneous multi-core processors. Heterogeneous multi-core processors integrate con...