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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 3 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
132
Voted
CCGRID
2005
IEEE
15 years 11 months ago
Performance evaluation of JXTA communication layers
— The arrival of the P2P model has opened many new avenues for research within the field of distributed computing. This is mainly due to important practical features (such as su...
Gabriel Antoniu, Philip J. Hatcher, Mathieu Jan, D...
CODES
2004
IEEE
15 years 9 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
160
Voted
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
14 years 9 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
HPDC
2000
IEEE
15 years 10 months ago
Creating Large Scale Database Servers
The BaBar experiment at the Stanford Linear Accelerator Center (SLAC) is designed to perform a high precision investigation of the decays of the B-meson produced from electron-pos...
Jacek Becla, Andrew Hanushevsky