201 search results - page 31 / 41 » Evaluating Run-Time Techniques for Leakage Power Reduction |
RTSS
2003
IEEE
14 years 26 days ago
2003
IEEE
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
IJES
2007
13 years 7 months ago
2007
Abstract: Main memory has become one of the largest contributors to overall energy consumption and offers many opportunities for power/energy reduction. In this paper, we propose ...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek ...