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» Evaluating kilo-instruction multiprocessors
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3DIC
2009
IEEE
263views Hardware» more  3DIC 2009»
13 years 10 months ago
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Mo Kwa...
ASPLOS
2011
ACM
12 years 11 months ago
RCDC: a relaxed consistency deterministic computer
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ce...
ICPPW
2009
IEEE
14 years 2 months ago
Evaluation of Existing Schedulability Tests for Global EDF
—The increasing attention on global scheduling algorithms for identical multiprocessor platforms produced different, independently developed, schedulability tests. However, the e...
Marko Bertogna
ISHPC
2000
Springer
13 years 11 months ago
Implementation and Evaluation of OpenMP for Hitachi SR8000
This paper describes the implementation and evaluation of the OpenMP compiler designed for the Hitachi SR8000 Super Technical Server. The compiler performs parallelization for the ...
Yasunori Nishitani, Kiyoshi Negishi, Hiroshi Ohta,...
ICS
1993
Tsinghua U.
13 years 11 months ago
Static and Dynamic Evaluation of Data Dependence Analysis
—Data dependence analysis techniques are the main component of today’s strategies for automatic detection of parallelism. Parallelism detection strategies are being incorporate...
Paul Petersen, David A. Padua