We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Performance evaluation of contemporary processors is becoming increasingly difficult due to the lack of proper frameworks. Traditionally, cycle-accurate simulators have been exte...
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Dani...
We propose regression modeling as an efficient approach for accurately predicting performance and power for various applications executing on any microprocessor configuration in a...
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...