56 search results - page 6 / 12 » Evaluation and Design of Processor-Like Reconfigurable Archi... |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper we present a methodology that is based on SystemC [1] for rapid prototyping to greatly enhance and accelerate the exploration of complex systems to optimize the syst...
EXPCS
2007
13 years 11 months ago
2007
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
TVLSI
2008
13 years 7 months ago
2008
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...