197 search results - page 6 / 40 » Evaluation of Computing in Memory Architectures for Digital ... |
JSSPP
1997
Springer
1997
Springer
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
13 years 11 months ago
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...
VLSISP
2008
13 years 7 months ago
2008
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
For a number of years, dataflow concepts have provided designers of digital signal processing systems with environments capable of expressing high-level software architectures as ...