104 search results - page 8 / 21 » Evaluation of design for reliability techniques in embedded ... |
FPL
2004
Springer
14 years 1 months ago
2004
Springer
A previous study [1] demonstrates the advantages of replacing registers by FPGA embedded memories during the storage allocation phase of High-Level Synthesis. The trend in new FPGA...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
As memory speeds and bus capacitances continue to rise, external memory bus power will make up an increasing portion of the total system power budget for system-on-a-chip embedded...
CASES
2004
ACM
14 years 1 months ago
2004
ACM
Title of thesis: MEMORY OVERFLOW PROTECTION FOR EMBEDDED SYSTEMS USING RUN-TIME CHECKS, REUSE AND COMPRESSION Surupa Biswas, Master of Science, 2004 Thesis directed by: Assistant ...
RTAS
2010
IEEE
13 years 6 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...