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» Event Processing - past, present and future
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ISCA
2008
IEEE
135views Hardware» more  ISCA 2008»
14 years 3 months ago
ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency
Process variations are poised to significantly degrade performance benefits sought by moving to the next nanoscale technology node. Parameter fluctuations in devices can introd...
Xiaoyao Liang, Gu-Yeon Wei, David Brooks
ECTEL
2007
Springer
14 years 3 months ago
Smart Indicators on Learning Interactions
Indicators help actors to organise, orientate and navigate through complex environments by providing contextual information relevant for the performance of learning tasks. In this ...
Christian Glahn, Marcus Specht, Rob Koper
ASPLOS
2009
ACM
14 years 1 months ago
Gordon: using flash memory to build fast, power-efficient clusters for data-intensive applications
As our society becomes more information-driven, we have begun to amass data at an astounding and accelerating rate. At the same time, power concerns have made it difficult to brin...
Adrian M. Caulfield, Laura M. Grupp, Steven Swanso...
IM
1997
13 years 10 months ago
The Hollowman: An Innovative ATM Control Architecture
The current implementation of out-of-band control in ATM networks inhibits their successful exploitation. The confusion in signalling protocols between application services and th...
Sean Rooney
JCP
2008
141views more  JCP 2008»
13 years 9 months ago
Leakage Controlled Read Stable Static Random Access Memories
Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a criti...
Sayeed A. Badrudduza, Ziyan Wang, Giby Samson, Law...