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VTS
2000
IEEE
167views Hardware» more  VTS 2000»
14 years 3 days ago
Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukher...
CODES
2010
IEEE
13 years 5 months ago
Worst-case performance analysis of synchronous dataflow scenarios
Synchronous Dataflow (SDF) is a powerful analysis tool for regular, cyclic, parallel task graphs. The behaviour of SDF graphs however is static and therefore not always able to ac...
Marc Geilen, Sander Stuijk
CODES
2007
IEEE
14 years 2 months ago
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions
High-end biomedical applications are a good target for specificpurpose system-on-chip (SoC) implementations. Human heart electrocardiogram (ECG) real-time monitoring and analysis ...
Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luc...
DATE
2008
IEEE
158views Hardware» more  DATE 2008»
14 years 2 months ago
Performance Analysis of SoC Architectures Based on Latency-Rate Servers
This paper presents a method for static performance analysis of SoC architectures. The method is based on a network calculus theory known as LR servers. This network calculus is e...
Jelte Peter Vink, Kees van Berkel, Pieter van der ...
AINA
2006
IEEE
14 years 1 months ago
Performance Analysis of Network Topologies in Agent-based Open Connectivity Architecture for DSS
Performance analysis of agent network topologies helps multi-agent system developers to understand the impact of topology on system efficiency and effectiveness. Appropriate topol...
Hao Lan Zhang, Clement H. C. Leung, Gitesh K. Raik...