Sciweavers

469 search results - page 42 / 94
» Evolutionary Approach to Test Generation for Functional BIST
Sort
View
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 1 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
TC
1998
13 years 8 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 9 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
14 years 1 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
GECCO
2005
Springer
140views Optimization» more  GECCO 2005»
14 years 2 months ago
A comparison of evolutionary algorithms for system-level diagnosis
The size and complexity of systems based on multiple processing units demand techniques for the automatic diagnosis of their state. System-level diagnosis consists in determining ...
Bogdan Tomoyuki Nassu, Elias Procópio Duart...