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» Evolving Hardware on a Large Scale
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IJPP
2011
115views more  IJPP 2011»
13 years 1 months ago
Milepost GCC: Machine Learning Enabled Self-tuning Compiler
Tuning compiler optimizations for rapidly evolving hardware makes porting and extending an optimizing compiler for each new platform extremely challenging. Iterative optimization i...
Grigori Fursin, Yuriy Kashnikov, Abdul Wahid Memon...
SC
2000
ACM
14 years 2 months ago
Performance of Hybrid Message-Passing and Shared-Memory Parallelism for Discrete Element Modeling
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
D. S. Henty
BMCBI
2005
246views more  BMCBI 2005»
13 years 9 months ago
ParPEST: a pipeline for EST data analysis based on parallel computing
Background: Expressed Sequence Tags (ESTs) are short and error-prone DNA sequences generated from the 5' and 3' ends of randomly selected cDNA clones. They provide an im...
Nunzio D'Agostino, Mario Aversano, Maria Luisa Chi...
DAC
2008
ACM
14 years 10 months ago
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction
In this paper, we present ELIAD, an efficient lithography aware detailed router to optimize silicon image after optical proximity correction (OPC) in a correct-by-construction man...
Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan
DAC
2006
ACM
14 years 10 months ago
Games are up for DVFS
Graphics-intensive computer games are no longer restricted to highperformance desktops, but are also available on a variety of portable devices ranging from notebooks to PDAs and ...
Yan Gu, Samarjit Chakraborty, Wei Tsang Ooi