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DATE
2002
IEEE
95views Hardware» more  DATE 2002»
15 years 8 months ago
Optimal Transistor Tapering for High-Speed CMOS Circuits
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...
Li Ding 0002, Pinaki Mazumder
127
Voted
WSC
1997
15 years 5 months ago
Model-Driven Simulation of World-Wide-Web Cache Policies
The World Wide Web (WWW) has experienced a dramatic increase in popularity since 1993. Many reports indicate that its growth will continue at an exponential rate. This growth has ...
Ying Shi, Edward Watson, Ye-Sho Chen
135
Voted
ICRA
2008
IEEE
173views Robotics» more  ICRA 2008»
15 years 10 months ago
Bayesian reinforcement learning in continuous POMDPs with application to robot navigation
— We consider the problem of optimal control in continuous and partially observable environments when the parameters of the model are not known exactly. Partially Observable Mark...
Stéphane Ross, Brahim Chaib-draa, Joelle Pi...
137
Voted
ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
15 years 9 months ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov
168
Voted
AB
2008
Springer
15 years 10 months ago
An Algorithm for Qualitative Simulation of Gene Regulatory Networks with Steep Sigmoidal Response Functions
A specific class of ODEs has been shown to be adequate to describe the essential features of the complex dynamics of Gene-Regulatory Networks (GRN). But, the effective exploitatio...
Liliana Ironi, Luigi Panzeri, Erik Plahte