453 search results - page 59 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
ISPASS
2008
IEEE
14 years 3 months ago
2008
IEEE
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
ISLPED
2005
ACM
14 years 2 months ago
2005
ACM
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
SSDBM
2005
IEEE
14 years 2 months ago
2005
IEEE
Scientific investigations have to deal with rapidly growing amounts of data from simulations and experiments. During data analysis, scientists typically want to extract subsets o...
HPCA
2001
IEEE
14 years 9 months ago
2001
IEEE
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
CF
2006
ACM
14 years 2 months ago
2006
ACM
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...