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ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
14 years 1 months ago
A Language for Describing Predictors and Its Application to Automatic Synthesis
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
Joel S. Emer, Nicholas C. Gloy
FPL
2007
Springer
97views Hardware» more  FPL 2007»
14 years 20 days ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
13 years 6 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
VLDB
2002
ACM
129views Database» more  VLDB 2002»
13 years 8 months ago
Optimizing View Queries in ROLEX to Support Navigable Result Trees
An increasing number of applications use XML data published from relational databases. For speed and convenience, such applications routinely cache this XML data locally and acces...
Philip Bohannon, Sumit Ganguly, Henry F. Korth, P....
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
14 years 2 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...