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ISPASS
2006
IEEE
14 years 1 months ago
Critical path analysis of the TRIPS architecture
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
Ramadass Nagarajan, Xia Chen, Robert G. McDonald, ...
ASPLOS
2006
ACM
14 years 1 months ago
Tradeoffs in transactional memory virtualization
For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems s...
JaeWoong Chung, Chi Cao Minh, Austen McDonald, Tra...
APCSAC
2005
IEEE
14 years 1 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi
ASPLOS
2004
ACM
14 years 1 months ago
HIDE: an infrastructure for efficiently protecting information leakage on the address bus
+ XOM-based secure processor has recently been introduced as a mechanism to provide copy and tamper resistant execution. XOM provides support for encryption/decryption and integrit...
Xiaotong Zhuang, Tao Zhang, Santosh Pande
PLDI
2000
ACM
14 years 3 days ago
Dynamo: a transparent dynamic optimization system
We describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stre...
Vasanth Bala, Evelyn Duesterwald, Sanjeev Banerjia