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ICCAD
2007
IEEE
113views Hardware» more  ICCAD 2007»
14 years 3 months ago
The FAST methodology for high-speed SoC/computer simulation
— This paper describes the FAST methodology that enables a single FPGA to accelerate the performance of cycle-accurate computer system simulators modeling modern, realistic SoCs,...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
IJON
2007
83views more  IJON 2007»
13 years 9 months ago
Neurospaces: Towards automated model partitioning for parallel computers
Parallel computers have the computing power needed to simulate biologically accurate neuronal network models. Partitioning is the process of cutting a model in pieces and assignin...
Hugo Cornelis, Erik De Schutter
WSC
1997
13 years 10 months ago
Minimum Cost Adaptive Synchronization: Experiments with the ParaSol System
We present a novel adaptive synchronization algorithm, called the minimum average cost (MAC) algorithm, in the context of the ParaSol parallel simulation system. ParaSol is a mult...
Edward Mascarenhas, Felipe Knop, Vernon Rego
ISSS
2002
IEEE
120views Hardware» more  ISSS 2002»
14 years 1 months ago
Virtual Synchronization for Fast Distributed Cosimulation of Dataflow Task Graphs
Fast distributed cosimulation is a challenging problem for the embedded system design. The main theme of this paper is to increase simulation speed by reducing the frequency of in...
Soonhoi Ha, Sungchan Kim, Chan-Eun Rhee, Hyunguk J...
ISCA
1998
IEEE
128views Hardware» more  ISCA 1998»
14 years 1 months ago
Analytic Evaluation of Shared-memory Systems with ILP Processors
This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploi...
Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mar...