506 search results - page 53 / 102 » Execution-Driven Simulators for Parallel Systems Design |
118
Voted
WSC
1997
15 years 3 months ago
1997
We describe our experiences designing and implementing a virtual PNNI network testbed. The network elements and signaling protocols modeled are consistent with the ATM Forum PNNI ...
109
Voted
ICS
1999
Tsinghua U.
15 years 6 months ago
1999
Tsinghua U.
Current high-end parallel systems achieve low-latency, highbandwidth network communication through the use of aggressive design techniques and expensive mechanical and electrical ...
123
Voted
ISLPED
2004
ACM
15 years 8 months ago
2004
ACM
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
150
Voted
PPL
2008
15 years 2 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
115
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DATE
2010
IEEE
15 years 7 months ago
2010
IEEE
-- Starting Electronic System Level (ESL) design flows with executable High-Level Models (HLMs) has the potential to sustainably improve productivity. However, writing good HLMs fo...