With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Ma...
REX is a program that extracts parasitic resistance and capacitance values for nodes in VLSI layouts. REX also performs network serial and parallel simplifications. Two types of n...
The automated analysis of Feature Models (FMs) focuses on the usage of different logic paradigms and solvers to implement a number of analysis operations on FMs. The implementatio...
Sergio Segura, David Benavides, Antonio Ruiz Cort&...
The central concern of terminology, a component of the general documentation process, is concept analysis, an activity which is becoming recognized as fundamental as term banks evo...
Worst-case execution time (WCET) analysis is indispensable for the successful design and development of systems, which, in addition to their functional constraints, have to satisf...
Raimund Kirner, Jens Knoop, Adrian Prantl, Markus ...