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ASPDAC
2007
ACM
92views Hardware» more  ASPDAC 2007»
15 years 9 months ago
New Block-Based Statistical Timing Analysis Approaches Without Moment Matching
With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Ma...
Ruiming Chen, Hai Zhou
130
Voted
DAC
1991
ACM
15 years 9 months ago
REX - A VLSI Parasitic Extraction Tool for Electromigration and Signal Analysis
REX is a program that extracts parasitic resistance and capacitance values for nodes in VLSI layouts. REX also performs network serial and parallel simplifications. Two types of n...
Jerry P. Hwang
151
Voted
SPLC
2008
15 years 7 months ago
Functional Testing of Feature Model Analysis Tools. A First Step
The automated analysis of Feature Models (FMs) focuses on the usage of different logic paradigms and solvers to implement a number of analysis operations on FMs. The implementatio...
Sergio Segura, David Benavides, Antonio Ruiz Cort&...
COLING
1990
15 years 6 months ago
Concept Analysis And Terminology: A Knowledge-Based Approach To Documentation
The central concern of terminology, a component of the general documentation process, is concept analysis, an activity which is becoming recognized as fundamental as term banks evo...
Douglas R. Skuce, Ingrid Meyer
WCET
2007
15 years 6 months ago
WCET Analysis: The Annotation Language Challenge
Worst-case execution time (WCET) analysis is indispensable for the successful design and development of systems, which, in addition to their functional constraints, have to satisf...
Raimund Kirner, Jens Knoop, Adrian Prantl, Markus ...