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DAC
2009
ACM
14 years 9 months ago
Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...
DAC
2005
ACM
13 years 10 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
FMCAD
2006
Springer
14 years 10 days ago
Formal Analysis and Verification of an OFDM Modem Design using HOL
In this paper we formally specify and verify an implementation of the IEEE802.11a standard physical layer based OFDM (Orthogonal Frequency Division Multiplexing) modem using the HO...
Abu Nasser Mohammed Abdullah, Behzad Akbarpour, So...
ISLPED
2003
ACM
127views Hardware» more  ISLPED 2003»
14 years 1 months ago
Lightweight set buffer: low power data cache for multimedia application
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
Jun Yang 0002, Youtao Zhang
CORR
2008
Springer
57views Education» more  CORR 2008»
13 years 8 months ago
Square Complex Orthogonal Designs with Low PAPR and Signaling Complexity
Abstract--Space-Time Block Codes from square complex orthogonal designs (SCOD) have been extensively studied and most of the existing SCODs contain large number of zero. The zeros ...
Smarajit Das, B. Sundar Rajan