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DATE
2004
IEEE
132views Hardware» more  DATE 2004»
14 years 17 days ago
Hybrid Architectural Dynamic Thermal Management
When an application or external environmental conditions cause a chip's cooling capacity to be exceeded, dynamic thermal management (DTM) dynamically reduces the power densit...
Kevin Skadron
BMCBI
2010
190views more  BMCBI 2010»
13 years 9 months ago
Sample size and statistical power considerations in high-dimensionality data settings: a comparative study of classification alg
Background: Data generated using `omics' technologies are characterized by high dimensionality, where the number of features measured per subject vastly exceeds the number of...
Yu Guo, Armin Graber, Robert N. McBurney, Raji Bal...
ANCS
2009
ACM
13 years 6 months ago
Progressive hashing for packet processing using set associative memory
As the Internet grows, both the number of rules in packet filtering databases and the number of prefixes in IP lookup tables inside the router are growing. The packet processing e...
Michel Hanna, Socrates Demetriades, Sangyeun Cho, ...
CDES
2006
158views Hardware» more  CDES 2006»
13 years 10 months ago
A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia
DATE
2008
IEEE
157views Hardware» more  DATE 2008»
14 years 3 months ago
Clock Distribution Scheme using Coplanar Transmission Lines
The current work describes a new standing wave oscillator scheme aimed for clock propagation on coplanar transmission lines on a silicon die. The design is aimed for clock signali...
Victor H. Cordero, Sunil P. Khatri