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» Experiences with Soft-Core Processor Design
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CODES
2001
IEEE
13 years 11 months ago
The TACO protocol processor simulation environment
Network hardware design is becoming increasingly challenging because more and more demands are put on network bandwidth and throughput requirements, and on the speed with which ne...
Seppo Virtanen, Johan Lilius
FPL
2003
Springer
128views Hardware» more  FPL 2003»
14 years 1 months ago
A Generic Architecture for Integrated Smart Transducers
Abstract. A smart transducer network hosts various nodes with different functionality. Our approach offers the possibility to design different smart transducer nodes as a system...
Martin Delvai, Ulrike Eisenmann, Wilfried Elmenrei...
TPDS
2008
124views more  TPDS 2008»
13 years 7 months ago
Efficient Breadth-First Search on the Cell/BE Processor
Multicore processors are an architectural paradigm shift that promises a dramatic increase in performance. But, they also bring an unprecedented level of complexity in algorithmic ...
Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Pe...
FPL
2008
Springer
119views Hardware» more  FPL 2008»
13 years 9 months ago
An FPGA-based high-speed, low-latency trigger processor for high-energy physics
An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high b...
Jan de Cuveland, Felix Rettig, Venelin Angelov, Vo...
ICCAD
1998
IEEE
168views Hardware» more  ICCAD 1998»
14 years 3 days ago
On-line scheduling of hard real-time tasks on variable voltage processor
We consider the problem of scheduling the mixed workload of both sporadic (on-line) and periodic (off-line) tasks on variable voltage processor to optimize power consumption while...
Inki Hong, Miodrag Potkonjak, Mani B. Srivastava