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» Experiences with Soft-Core Processor Design
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RAS
2008
108views more  RAS 2008»
13 years 8 months ago
Towards long-lived robot genes
Robot projects are often evolutionary dead ends, with the software and hardware they produce disappearing without trace afterwards. Common causes include dependencies on uncommon ...
Paul M. Fitzpatrick, Giorgio Metta, Lorenzo Natale
PPOPP
2009
ACM
14 years 9 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
DAC
2002
ACM
14 years 10 months ago
Schedulability of event-driven code blocks in real-time embedded systems
Many real-time embedded systems involve a collection of independently executing event-driven code blocks, having hard real-time constraints. Tasks in many such systems, like netwo...
Samarjit Chakraborty, Thomas Erlebach, Simon K&uum...
DAC
2005
ACM
14 years 10 months ago
Improving java virtual machine reliability for memory-constrained embedded systems
Dual-execution/checkpointing based transient error tolerance techniques have been widely used in the high-end mission critical systems. These techniques, however, are not very att...
Guangyu Chen, Mahmut T. Kandemir
VLSID
2009
IEEE
139views VLSI» more  VLSID 2009»
14 years 9 months ago
Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration
Increasing the number of cores in a multi-core processor reduces per-core performance. On the other hand, providing more resources to each core limits the number of cores on a chi...
Tameesh Suri, Aneesh Aggarwal