Sciweavers

192 search results - page 32 / 39
» Experiences with the Blackfin architecture in an embedded sy...
Sort
View
IMC
2006
ACM
14 years 1 months ago
Touring the internet in a TCP sidecar
An accurate router-level topology of the Internet would benefit many research areas, including network diagnosis, inter-domain traffic engineering, and overlay construction. We ...
Rob Sherwood, Neil Spring
SAMOS
2004
Springer
14 years 25 days ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
CODES
2007
IEEE
14 years 1 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
RTAS
2005
IEEE
14 years 1 months ago
VPN Gateways over Network Processors: Implementation and Evaluation
Networking applications, such as VPN and content filtering, demand extra computing power in order to meet the throughput requirement nowadays. In addition to pure ASIC solutions, ...
Yi-Neng Lin, Chiuan-Hung Lin, Ying-Dar Lin, Yuan-C...
CODES
2006
IEEE
13 years 11 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...