Sciweavers

1256 search results - page 236 / 252
» Experiences with the DEVStone benchmark
Sort
View
155
Voted
COOPIS
2002
IEEE
15 years 10 months ago
Empirical Differences between COTS Middleware Scheduling Strategies
The proportion of complex distributed real-time embedded (DRE) systems made up of commercial-off-the-shelf (COTS) hardware and software is increasing significantly in response to...
Christopher D. Gill, Fred Kuhns, Douglas C. Schmid...
DATE
2002
IEEE
124views Hardware» more  DATE 2002»
15 years 10 months ago
Crosstalk Alleviation for Dynamic PLAs
—The dynamic programmable logic array (PLA) style has become popular in designing high-performance microprocessors because of its high speed and predictable routing delay. Howeve...
Tzyy-Kuen Tien, Tong-Kai Tsai, Shih-Chieh Chang
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 10 months ago
Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis
We introduce a new approach, “Dynamic Common Sub-expression Elimination (CSE)”, that dynamically eliminates common sub- expressions based on new opportunities created during s...
Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Ni...
MICRO
2002
IEEE
97views Hardware» more  MICRO 2002»
15 years 10 months ago
Three extensions to register integration
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...
Vlad Petric, Anne Bracy, Amir Roth
ICSE
2010
IEEE-ACM
15 years 10 months ago
Views: object-inspired concurrency control
We present views, a new approach to controlling concurrency. Fine-grained locking is often necessary to increase concurrency. Correctly implementing fine-grained locking with tod...
Brian Demsky, Patrick Lam