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» Experimental Assessment of Parallel Systems
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DATE
2010
IEEE
113views Hardware» more  DATE 2010»
14 years 21 days ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
SSDBM
1999
IEEE
118views Database» more  SSDBM 1999»
13 years 12 months ago
Evaluation of Ad Hoc OLAP: In-Place Computation
Large scale data analysis and mining activities, such as identifying interesting trends, making unusual patterns to stand out and verifying hypotheses, require sophisticated infor...
Damianos Chatziantoniou
ASPLOS
2006
ACM
13 years 11 months ago
Integrated network interfaces for high-bandwidth TCP/IP
This paper proposes new network interface controller (NIC) designs that take advantage of integration with the host CPU to provide increased flexibility for operating system kerne...
Nathan L. Binkert, Ali G. Saidi, Steven K. Reinhar...
CASES
2006
ACM
13 years 11 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
SI3D
1995
ACM
13 years 11 months ago
Real-Time Programmable Shading
One of the main techniques used by software renderers to produce stunningly realistic images is programmable shading—executing an arbitrarily complex program to compute the colo...
Anselmo Lastra, Steven Molnar, Marc Olano, Yulan W...